Liquid crystal display panel

ABSTRACT

A liquid crystal display (LCD) panel that has even luminance with high picture quality is disclosed. The LCD panel includes a first substrate provided with a plurality of gate and data lines, the gate lines being arranged to cross the data lines to define a plurality of pixel regions in a matrix arrangement; a second substrate provided with a black matrix layer to shield portions other than the pixel region from light; and a liquid crystal layer injected between the first and second substrates, wherein the pixel regions at a surrounding portion have an aperture ratio lower than that of the pixel regions at the other portions.

[0001] This application claims the benefit of Korean Patent ApplicationNo. 2000-80214 filed on Dec. 22, 2000, which is hereby incorporated byreference as if fully set forth herein.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates to a liquid crystal display (LCD)device, and more particularly, to an LCD panel that prevents luminanceoccurring in a contour of a cell region from being higher than thatoccurring in the cell region, thereby improving picture quality.

[0004] 2. Discussion of the Related Art

[0005] Rapid development within the fields of information andcommunication has caused an increase in the demand for thin, lightweightand low cost display devices for viewing information. Industries thatdevelop displays are responding to these needs by placing high emphasison developing flat panel type displays.

[0006] Historically, the Cathode Ray Tube (CRT) has been widely used asa display device in applications such as televisions, computer monitors,and the like, because CRT screens can display various colors with highluminance. However, the CRT cannot adequately satisfy present demandsfor display applications that require reduced volume and weight,portability, and low power consumption, while having a large screen sizeand high resolution. Out of this need, the display industry has placedhigh emphasis on developing flat panel displays to replace the CRT. Overthe years, flat panel displays have found wide use in monitors forcomputers, spacecraft, and aircraft. Examples of flat panel displaytypes currently used include the LCD, the electroluminescent display(ELD), the field emission display (FED), and the plasma display panel(PDP).

[0007] Characteristics required for an ideal flat panel display includea lightweight, high luminance, high efficiency, high resolution, highspeed response time, low driving voltage, low power consumption, lowcost, and natural color.

[0008] Generally, a phosphor material on a surface of the CRT emitslight in an analog type based on an externally applied display timingsignal and an externally applied data signal, so that a trace of anelectron beam is controlled. On the other hand, the LCD controls theelectric field applied to the liquid crystal located in each display sothat transmittivity of light is controlled.

[0009] Development and application of thin film transistor (TFT) -LCDindustries have been accelerated in accordance with the increase in thedimensions and increase in the resolution. To increase the productivity,many efforts have been focused on simplifying process steps andimproving yield.

[0010] A related art LCD panel is now described with reference to FIG.1.

[0011]FIG. 1 is a plan view illustrating a related art LCD panel.

[0012] As shown in FIG. 1, a plurality of gate lines G1, G2, . . . , Gnare arranged to cross a plurality of data lines D1, D2, . . . , Dn, sothat a plurality of pixel regions are defined. A TFT is formed at eachcrossing point between the respective gate line and the respective dataline. A pixel electrode 15 is formed in each pixel region.

[0013] The TFT includes a gate electrode 11 extending from the gatelines, a gate insulating film (not shown) over the gate electrode, asemiconductor layer 12 on the gate insulating film, and source and drainelectrodes 13 and 14 on the semiconductor layer 12.

[0014] All the gate lines G1, . . . , Gn have substantially the samewidths as one another. All the data lines D1, . . . , Dn also havesubstantially the same widths as one another.

[0015] A pixel electrode 15 including a transparent conductive materialsuch as indium tin oxide (ITO) is formed in each pixel region. Eachpixel electrode 15 has the same aperture ratio over the entire region ofthe panel.

[0016] As shown in FIG. 1, no pixel electrode is formed above the firstgate line G1. Likewise, no pixel electrode is formed before the firstdata line D1 and the nth data line Dn.

[0017] The process for fabricating the aforementioned related art LCDpanel will now be described with reference to FIG. 2A to FIG. 2C.

[0018] As shown in FIG. 2A, a gate electrode material, such as Al, Cr,Mo, Ta, and Al alloy, is formed on an insulating substrate by asputtering process and then is patterned, so that the plurality of gatelines G1, G2, . . . , Gn having the gate electrode 11 are formed to havesubstantially the same widths.

[0019] Afterwards, the gate insulating film (not shown) of SiN_(x) orSiO_(x) is formed on the entire surface including the gate lines G1, G2,. . . , Gn. As shown in FIG. 2B, a semiconductor layer 12 used as achannel of the TFT is patterned on the gate insulating film over thegate electrode 11.

[0020] Subsequently, the plurality of data lines D1, D2, . . . , Dn areformed to cross the gate lines G1, G2, . . . , Gn. At the same time, thesource and drain electrodes 13 and 14 are formed over the semiconductorlayer 12. At this time, the data lines D1, D2, . . . , Dn havesubstantially the same width over the whole region of the panel.

[0021] As shown in FIG. 2C, a passivation film (not shown) is formed onthe entire surface including the data lines D1, D2, . . . , Dn and thesource and drain electrodes 13 and 14. A contact hole is then formed toexpose the drain electrode 14. The pixel electrode 15 is formed toelectrically connect with the drain electrode 14 through the contacthole.

[0022] At this time, since the respective pixel electrodes 15 havesubstantially the same area as one another over the whole region of thepanel, they have the same aperture ratio as eash other.

[0023] Thus, a TFT substrate is manufactured.

[0024] Although not shown, the TFT substrate and an opposing colorfilter substrate are prepared and attached to each other. A liquidcrystal is then injected between the two substrates. Thus, the processfor manufacturing the related art LCD panel is completed.

[0025] However, the related art LCD panel has several problems.

[0026] Since no electrode(pixel electrode) is formed before the firstdata line, after the last data line, or above the gate line, theelectric field does not occur therein. Accordingly, in view of the wholeregion of the panel, the electric field intensity varies depending onthe portion where the pixel electrode is formed and the portion wherethe pixel electrode is not formed, thereby causing difference intransmittivity therebetween.

[0027] According to the experiments, the transmittivity differencebetween the portion where the pixel electrode is formed and the portionwhere the pixel electrode is not formed is about 12%. Accordingly,luminance occurring before the first data line, after the last dataline, or above the gate line is higher than that at the other portions.For this reason, picture quality is deteriorated.

SUMMARY OF THE INVENTION

[0028] Accordingly, the present invention is directed to an LCD panelthat substantially obviates one or more of the problems due tolimitations and disadvantages of the related art.

[0029] An object of the present invention is to provide an LCD panelthat has even luminance with high picture quality.

[0030] Additional features and advantages of the invention will be setforth in the description that follows, and in part will be apparent fromthe description, or may be learned by practice of the invention. Theobjectives and other advantages of the invention will be realized andattained by the scheme particularly pointed out in the writtendescription and claims hereof as well as the appended drawings.

[0031] To achieve these and other advantages in accordance with thepresent invention, as embodied and broadly described, a liquid crystaldisplay panel includes a first substrate provided with a plurality ofgate and data lines, the gate lines being arranged to cross the datalines to define a plurality of pixel regions in a matrix arrangement; asecond substrate provided with a black matrix layer to shield portionsother than the pixel regions from light; and a liquid crystal layerinjected between the first and second substrates, wherein the pixelregions in a peripheral portion of the matrix arrangement have anaperture ratio lower than that of the pixel region at the other portionsin the matrix arrangement.

[0032] A first gate line among the gate lines has a greater width thanwidths of the other gate lines, and a first data line or a last dataline among the data lines has a greater width than widths of the otherdata lines.

[0033] The black matrix layer corresponding to the first gate line, thefirst data line or the last data line has a greater width than widths ofthe black matrix layer corresponding to the other portions.

[0034] A light-shielding pattern is further provided in the pixelregions in the peripheral portion, and the pixel regions in theperipheral portion have an aperture ratio reduced by 10˜15% more thanaperture ratios of the pixel region at the other portions.

[0035] In another aspect of the present invention, a liquid crystaldisplay panel includes a plurality of gate lines arranged in onedirection at constant intervals; a plurality of data lines arranged atconstant intervals to be substantially perpendicular to the gate linesto define a plurality of pixel regions in a matrix arrangement; and aplurality of pixel electrodes, wherein one pixel electrode is in eachpixel region, wherein the pixel electrodes at a peripheral portion ofthe matrix arrangement are narrower than the pixel electrode at theother portions.

[0036] A gate line that does not drive the pixel electrode among thegate lines has a greater width than widths of the other gate lines. Afirst data line or a last data line among the data lines has a greaterwidth than widths of the other data lines. The pixel electrodes adjacentto the first data line or the last data line have a smaller area thanareas of the other pixel electrodes.

[0037] In still another aspect of the present invention, a liquidcrystal display panel according to the present invention includes afirst substrate provided with a plurality of gate and data lines, thegate lines being arranged to cross the data lines to define a pluralityof pixel regions in a matrix arrangement; a second substrate providedwith a black matrix layer to shield portions other than the pixelregions from light; and a liquid crystal layer injected between thefirst and second substrates, wherein the black matrix layercorresponding to a first data line or a last data line among the datalines has a greater width than the black matrix layer corresponding tothe other lines.

[0038] The black matrix layer corresponding to a first gate line amongthe gate lines has a greater width than the black matrix layercorresponding to the other gate lines.

[0039] In further another aspect of the present invention, a liquidcrystal display panel includes a plurality of gate lines arranged in onedirection at constant intervals; a plurality of data lines arranged atconstant intervals to be substantially perpendicular to the gate linesto define a plurality of pixel regions in a matrix arrangement; and aplurality of light-shielding patterns in at least one of the pixelregions at a surrounding portion among the pixel regions.

[0040] The light-shielding patterns are in the pixel regions adjacent toa first data line or a last data line among the data lines. Thelight-shielding patterns are a metal which is the same material as thatof the data lines.

[0041] In further still another aspect of the present invention, an LCDpanel includes: first and second substrates; a plurality of gate anddata lines arranged on the first substrate to define a plurality ofpixel regions, the gate lines crossing the data lines; a plurality ofpixel electrodes, wherein one pixel electrode is in each pixel region;and a black matrix pattern formed on the second substrate to shieldportions other than the pixel electrodes from light, wherein a firstgate line among the gate lines has a greater width than the other gatelines, one of a first data line and a last data line among the datalines has a width greater than the other data lines, and the blackmatrix pattern corresponding to the first gate line, the first data lineor the last data line has a width greater than the black matrix patterncorresponding to the other portions.

[0042] A plurality of thin film transistors are further provided in acrossing portion of the respective gate line and the respective dataline.

[0043] The pixel electrodes adjacent to the first data line and/or thelast data line have smaller area than the other pixel electrodes.

[0044] The pixel electrodes adjacent to the first data line and the lastdata line have an aperture ratio reduced by 10˜15% of aperture ratios ofthe other pixel electrodes.

[0045] In the LCD panel of the present invention, to remove relativelyhigh luminance caused because a region where a pixel electrode is notformed has higher transmittivity than that of a region where a pixelelectrode is formed, an aperture ratio in a region of the pixelelectrode adjacent to where the pixel electrode is not formed is reducedso that even luminance distribution can be obtained.

[0046] It is to be understood that both the foregoing generaldescription and the following detailed description are exemplary andexplanatory and are intended to provide further explanation of theinvention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The accompanying drawings, which are included to provide afurther understanding of the invention and are incorporated in andconstitute a part of the specification, illustrate embodiments of theinvention and together with the description serve to explain theprinciples of the invention. In the drawings:

[0048]FIG. 1 is a plan view illustrating a related art LCD panel;

[0049]FIG. 2 is a cross-sectional view illustrating a related art methodfor fabricating an LCD panel;

[0050]FIG. 3 is a plan view illustrating an LCD panel according to thefirst embodiment of the present invention;

[0051]FIG. 4 is a sectional view taken along line I-I′ of FIG. 3;

[0052]FIG. 5 is a plan view illustrating an LCD panel according to thesecond embodiment of the present invention;

[0053]FIG. 6 is a sectional view taken along line II-II′ of FIG. 5;

[0054]FIG. 7 is a plan view illustrating an LCD panel according to thethird embodiment of the present invention;

[0055]FIG. 8 is a plan view illustrating an LCD panel according to thefourth embodiment of the present invention;

[0056]FIG. 9 is a sectional view taken along line III-III′ of FIG. 8;

[0057]FIG. 10 is a plan view illustrating an LCD panel according to thefifth embodiment of the present invention; and

[0058]FIG. 11 is a sectional view taken along line IV-IV′ of FIG. 10.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

[0059] Reference will now be made in detail to the illustratedembodiments of the present invention, examples of which are illustratedin the accompanying drawings.

[0060]FIG. 3 is a plan view illustrating an LCD panel according to thefirst embodiment of the present invention. FIG. 4 is a sectional viewtaken along line I-I′ of FIG. 3, in which relatively high luminance isremoved by varying a width of data lines.

[0061] As shown in FIG. 3, a plurality of gate lines G1, G2, . . . , Gnare arranged in one direction and a plurality of data lines D1, D2, . .. , Dn are arranged to cross the gate lines G1, G2, . . . , Gn to definea plurality of pixel regions.

[0062] A plurality of TFTs are formed at each crossing point between therespective gate line and the respective data line. A plurality of pixelelectrodes 37 are formed so that each pixel electrode is connected witha drain electrode of each respective TFT.

[0063] At least one of the first data line D1 and the last data line Dnhas a portion that extends into the pixel region toward the pixelelectrode 37. The other data lines D2, D3, . . . , Dn-1 do not have sucha portion. Therefore, the pixel electrodes 37 a adjacent to the one ofthe first data line D1 and the last data line Dn have a smaller areathan the pixel electrodes 37 adjacent the remaining data lines D2, . . ., Dn-1. The smaller area of the pixel electrode 37 a means reduction ofan aperture ratio.

[0064] In FIG. 3, a shaded region indicates an oblique region where nopixel electrodes 37 and 37 a are formed. Luminance is higher in theoblique region than in the regions where the pixel electrode is formed.For this reason, there is an uneven luminance distribution over thewhole LCD panel.

[0065] To obtain even luminance distribution, a method is provided forreducing aperture ratio in a pixel electrode region adjacent to theoblique region. To this end, as shown in FIG. 3, portions of the firstdata line D1 and the last data line Dn are made to be wider than theother data lines D2, D3, . . . , Dn-1, so that the aperture ratio in acorresponding region is reduced. At this time, the reduced apertureratio is within the range of about 10˜15% lower than the aperture ratioof the other pixel electrode regions.

[0066]FIG. 4 is a sectional view taken along line I-I′ of FIG. 3.Referring to FIG. 4, the gate insulating film 32 is formed on the firstsubstrate 31. The first data line D1 and the last PATENT data line Dnhave the greater widths than the other data lines D2, D3, . . . , Dn−1on the gate insulating film 32.

[0067] At this time, although not shown, a gate electrode of the TFT isformed on the first substrate 31. A semiconductor layer is formed on thegate insulating film 32 and is used as a channel of the TFT. Source anddrain electrodes are formed on the semiconductor layer by the sameprocess as the process for forming the data lines.

[0068] A passivation film 33 is formed on the entire surface includingthe data lines D1, D2, . . . , Dn. Pixel electrodes 37 and 37 a areformed on the passivation film 33. At this time, an area of the pixelelectrode adjacent to the first data line D1 and the last data line Dnis smaller than areas of the other pixel electrodes because the area ofthe pixel electrode adjacent to the first data line D1 is by the area ofthe extended portion of the first data line.

[0069] The pixel electrode includes a transparent material such as ITO.The data line includes a metal material such as Al, Cr, Mo, Ta, and Alalloy. Accordingly, the pixel electrode 37 a adjacent to the first dataline D1, and the last data line Dn have less area than the other pixelelectrodes 37 and the data lines D1 and Dn have larger widths, so thattransmittivity of light irradiated from a back light (not shown) isreduced to reduce the aperture ratio.

[0070] Accordingly, relatively high luminance in the region where thepixel electrode is not formed is compensated by reducing the apertureratio around the region, so that even luminance distribution can beobtained over the LCD panel as a whole.

[0071] Meanwhile, FIG. 5 is a plan view illustrating an LCD panelaccording to the second embodiment of the present invention. FIG. 6 is asectional view taken along line II-II′ of FIG. 5.

[0072] In the LCD panel according to the second embodiment of thepresent invention, as shown in FIG. 5, the width of the first gate linethat does not drive a pixel electrode is controlled to remove relativelyhigh luminance in the region adjacent to the first data line, asindicated by the shading in FIG. 5 (oblique region). The width of thefirst gate line G1 is greater than the width of the other gate lines G2,G3, . . . , Gn. Thus, the aperture ratio is reduced because of thedecrease in area of the pixel region that is adjacent to the first gateline G1. At this time, the width of the gate line G1 is controlled sothat the aperture ratio is reduced by the range of about 10˜15%. In FIG.5, the width a of the first gate line G1 is greater than the width of a′of the other gate lines G2, . . . , Gn, i.e., a>a′, and the width b ofthe pixel region adjacent to the first gate line G1 is less than thewidth b′ of the other pixel regions, i.e. b<b′.

[0073] That is, a plurality of the gate lines G1, G2, . . . , Gn areformed on the first substrate 31, and a gate insulating film 32 isformed on the entire surface including the gate lines. The data line D1is formed to cross the gate lines.

[0074] The first gate line G01 of the gate lines G1, G2, . . . , Gn ispatterned to have a greater width than widths of the other gate linesG2, G3, . . . , Gn.

[0075] Accordingly, the pixel electrode 37 has a relatively small areaas compared to the other pixel regions because the width of the firstgate line G1 is greater than the width of the other gate lines G2, . . ., Gn. Thus, the aperture ratio is reduced by the decreased area of thepixel electrode.

[0076] As described above, in FIG. 3 and FIG. 4, to remove relativelyhigh luminance occurring before the first data line and after the lastdata line, the first and last data lines D1 and Dn are patterned to havegreater widths than the other data lines. In FIG. 5 and FIG. 6, toremove relatively high luminance occurring above the first gate line,the first gate line is patterned to have a greater width than the othergate lines.

[0077] Therefore, in the case where an LCD panel is formed based on FIG.3 and FIG. 4, relatively high luminance occurring at the front end ofthe first gate and data lines and at the rear end of the last data linecan be removed.

[0078]FIG. 7 is a plan view illustrating an LCD panel according to thethird embodiment of the present invention.

[0079] In the LCD panel according to the third embodiment of the presentinvention, as shown in FIG. 7, relatively high luminance occurring alongthe periphery of the LCD panel is removed by increasing the width of thefirst gate line and at the same time increasing the widths of the firstdata line D1 and the last data line Dn.

[0080] As described above, the aperture ratio of the pixel regionadjacent to the first data line D1 and the last data line Dn is reducedby increasing the widths of the first data line D1 and the last dataline Dn. At the same time, the aperture ratio of the pixel regionadjacent to the first gate line G1 is reduced by increasing the width ofthe first gate line G1. Thus, relatively high luminance occurring in theoblique region (indicated by shading in FIG. 7) is removed.

[0081] While relatively high luminance has been removed by controllingthe widths of the gate line and the data line, the relatively highluminance may be removed by controlling the width of a black matrixpattern formed on a second substrate.

[0082]FIG. 8 is a plan view illustrating an LCD panel according to thefourth embodiment of the present invention.

[0083] In the LCD panel according to the fourth embodiment of thepresent invention, as shown in FIG. 8, the black matrix pattern 41 onthe second substrate 31 a, which corresponds to the first gate line G1formed on the first substrate 31, the first data line D1 and the lastdata line Dn, is patterned to be wider than the other regions. Thus, theaperture ratio of the pixel region adjacent to the first gate line G1,the first data line D1 and the last data line Dn is reduced. The width Cof portions of the black matrix over the first and last data lines D1and Dn is greater than the width C′ of other portions of the blackmatrix over the other data lines. (see C>C′ in the drawing). The width Dof a portion of the black matrix over the first gate line G1 is greaterthan the width D′ of portions of the black matrix over the other gatelines G2 . . . Gn, i.e. D >D′. Thus the reduction in aperture ratio iswithin the range of about 10˜15%.

[0084] In other words, as shown in FIG. 9, the black matrix pattern 41on the second substrate 31 a corresponding to the first data line D1 andthe last data line Dn is patterned to be wider than the other regions.

[0085] As described above, in this embodiment the width of the blackmatrix pattern 41 formed on the second substrate 31 a is controlled,while the widths of the gate and data lines are maintained as they are.Thus, the aperture ratio of the pixel electrode region adjacent to aregion where the pixel electrode is not formed, is reduced, therebyremoving relatively high luminance occurring in the region where thepixel electrode is not formed.

[0086] In FIG. 9 reference numeral “42,” which is not described, denotesa color filter pattern that displays colors. Reference numeral “43”denotes a common electrode for applying a voltage to a liquid crystallayer 44 together with the pixel electrode 37.

[0087] Meanwhile, in addition to the method for controlling the width ofthe black matrix pattern, a light-shielding pattern that can reduce theaperture ratio may be formed in the pixel region adjacent to the regionwhere the relatively high luminance occurs.

[0088]FIG. 10 is a plan view illustrating an LCD panel according to thefifth embodiment of the present invention. FIG. 11 is a sectional viewtaken along line IV-IV′ of FIG. 10.

[0089] In other words, in the LCD panel according to the fifthembodiment of the present invention, as shown in FIG. 10 and FIG. 11, aplurality of gate lines G1, G2, . . . , Gn are arranged to cross aplurality of data lines D1, D2, . . . , Dn so that a plurality of pixelregions are defined. A thin film transistor (TFT) is formed at eachcrossing point of the respective gate line and the respective data line.A light-shielding pattern 51 is formed in the pixel region adjacent tothe first gate line G1, the first data line D1 and the last data lineDn. A pixel electrode 37 is formed in each pixel region.

[0090] In other words, the light-shielding pattern 51 is formed in thepixel region adjacent to the region where relatively high luminanceoccurs, so that the aperture ratio is reduced by about 10˜15%. As aresult, an even LCD panel having no relatively high luminance can beobtained.

[0091] The light-shielding pattern 51 is formed of the same material asthat of the gate line when the gate line is formed. Alternatively, thelight-shielding pattern 51 may be formed of the same material as that ofthe data line when the data line is formed.

[0092] As described above, the LCD panel of the present invention hasthe following advantages.

[0093] The relatively high luminance occurring in the region where thepixel electrode is not formed is removed by reducing the aperture ratioof the pixel region adjacent to the high luminance region, which resultsin the same transmittivity over the LCD panel as a whole. As a result,even luminance distribution having no relatively high luminance can beobtained, thereby providing an LCD panel having high picture quality.

[0094] The foregoing embodiments are merely exemplary and are not to beconstrued as limiting the present invention. The present teachings canbe readily applied to other types of apparatuses. The description of thepresent invention is intended to be illustrative, and not to limit thescope of the claims. Many alternatives, modifications, and variationswill be apparent to those skilled in the art.

What is claimed is:
 1. A liquid crystal display (LCD) panel comprising:a first substrate provided with a plurality of gate and data lines, thegate lines being arranged to cross the data lines to define a pluralityof pixel regions in a matrix arrangement; a second substrate providedwith a black matrix layer to shield portions other than the pixelregions from light; and a liquid crystal layer injected between thefirst and second substrates, wherein the pixel regions in a peripheralportion of the matrix arrangement has an aperture ratio lower than thatof the pixel regions in other portions of the matrix arrangement.
 2. Theliquid crystal display panel of claim 1, wherein a first gate line amongthe gate lines has a greater width than widths of the other gate linesso as to allow the pixel regions in the peripheral portion to obtain anaperture ratio lower than that of the pixel regions in the otherportions.
 3. The liquid crystal display panel of claim 1, wherein afirst data line or a last data line among the data lines has a greaterwidth than widths of the other data lines so as to allow the pixelregions in the peripheral portion to obtain an aperture ratio lower thanthat of the pixel regions in the other portions.
 4. The liquid crystaldisplay panel of claim 1, wherein the black matrix layer correspondingto at least one of a first gate line, a first data line and a last dataline has a greater width than widths of the black matrix layercorresponding to the other portions so as to allow the pixel regions inthe peripheral portion to obtain an aperture ratio lower than that ofthe pixel regions in the other portions.
 5. The liquid crystal displaypanel of claim 1, further comprising a light-shielding pattern in thepixel regions at the peripheral portion so as to allow the pixel regionsat the peripheral portion to obtain an aperture ratio lower than that ofthe pixel regions at the other portions.
 6. The liquid crystal displaypanel of claim 1, wherein an aperture ratio of the pixel regions in theperipheral portion is about 10˜15% lower than aperture ratios of thepixel regions at the other portions.
 7. An liquid crystal display panelcomprising: a plurality of gate lines arranged in one direction atconstant intervals; a plurality of data lines arranged at constantintervals to be substantially perpendicular to the gate lines to definea plurality of pixel regions in a matrix arrangement; and a plurality ofpixel electrodes, wherein one pixel electrode is in each pixel region,wherein the pixel electrodes at a peripheral portion of the matrixarrangement are narrower than the pixel electrodes at other portions ofthe matrix arrangement.
 8. The liquid crystal display panel of claim 7,wherein a gate line that does not drive the pixel electrode among thegate lines has a greater width than widths of other gate lines.
 9. Theliquid crystal display panel of claim 7, wherein at least one of a firstdata line and a last data line among the data lines has a greater widththan widths of other data lines.
 10. The liquid crystal display panel ofclaim 7, wherein area of the pixel electrodes adjacent to at least oneof a first data line and a last data line is less than areas of thepixel electrodes at the other portions.
 11. An liquid crystal displaypanel, comprising: a first substrate provided with a plurality of gateand data lines, the gate lines being arranged to cross the data lines todefine a plurality of pixel regions in a matrix arrangement; a secondsubstrate provided with a black matrix layer to shield portions otherthan the pixel regions from light; and a liquid crystal display layerinjected between the first and second substrates, wherein portions ofthe black matrix layer corresponding to at least one of a first dataline and a last data line among the data lines has a greater width thanportions of the black matrix layer corresponding to other data lines.12. The liquid crystal display panel of claim 11, wherein a portion ofthe black matrix layer corresponding to a first gate line among the gatelines has a greater width than portions of a the black matrix layercorresponding to other gate lines.
 13. An liquid crystal display panelcomprising: a plurality of gate lines arranged in one direction atconstant intervals; a plurality of data lines arranged at constantintervals to be substantially perpendicular to the gate lines to definea plurality of pixel regions in a matrix arrangement; and a plurality oflight-shielding patterns in at least one of the pixel regions at asurrounding portion among the pixel regions.
 14. The liquid crystaldisplay panel of claim 13, wherein the light-shielding patterns are inthe pixel regions adjacent to at least one of the a first data line anda last data line among the data lines.
 15. The liquid crystal displaypanel of claim 13, wherein the light-shielding patterns are metal. 16.The liquid crystal display panel of claim 15, wherein the metal is thesame material as that of the data lines.
 17. An liquid crystal displaypanel, comprising: first and second substrates; a plurality of gate anddata lines arranged on the first substrate to define a plurality ofpixel regions, the gate lines crossing the data lines; a plurality ofpixel electrodes, wherein at least one pixel electrode is in each pixelregion; and a black matrix pattern formed on the second substrate toshield portions other than the pixel electrodes from light, whereinwidth of a first gate line among the gate lines is greater than widthsof other gate lines, width of one of a first data line and a last dataline among the data lines is greater than widths of other data lines,and width of portions the black matrix pattern corresponding to one ofthe first gate line, the first data line and the last data line isgreater than widths of portions of the black matrix pattern notcorresponding to the one of the first gate line, the first data line,and the last data line.
 18. The liquid crystal display panel of claim17, further comprising a plurality of thin film transistors in acrossing portion of a respective gate line and a respective data line.19. The liquid crystal display panel of claim 17, wherein area of thepixel electrodes adjacent to at least one of the first data line and thelast data line is less than areas of other pixel electrodes.
 20. Theliquid crystal display panel of claim 17, wherein aperture ratio thepixel electrodes adjacent to at least one of the first data line and thelast data line is about 10˜15% lower than aperture ratios of other pixelelectrodes.